1. Field of the Invention
This invention relates to flat panel cathode ray tubes which utilize a field emitter cathode. In particular, the invention relates to the provision of a grid to control electron current between the field emitter cathode and phosphors on the anode in a flat cathode ray tube.
2. Description of Related Art
Numerous attempts have been made to construct a commercially practical flat panel cathode ray tube (CRT) (sometimes referred to as a "flat panel display"). None have been completely successful. One promising approach, known as a Field Emission Display (FED), utilizes a matrix of addressed cold cathode emitters.
FIG. 1 shows a view of a portion of a prior art flat CRT 150 including a field emission cathode 100. The field emission cathode 100 comprises a baseplate 101, emitters 104, row electrodes 102, column electrodes 103 and insulating layer 105. A faceplate 120, which is typically made of glass, is spaced apart less than 0.020" from the baseplate 101, and, though not shown by FIG. 1, forms a sealed enclosure with the baseplate 101. On the face plate 120 are an anode 121 and phosphor 122. The region between the faceplate 120 and baseplate 101 is held at a vacuum pressure of about 1.times.10.sup.-7 torr. Spacers 110 help support the baseplate 101 and faceplate 120 against the force of atmospheric pressure from outside the CRT.
FIG. 1 exaggerates the size of emitters 104. The emitters 104 lie at the intersections of row electrodes 102 and column electrodes 103. The emitters 104 are formed on, and electrically connected to, row electrodes 102. The emitters 104 emit electrons toward phosphor 122 coated on faceplate 120. The phosphor 122 produces light when struck by electrons of the proper energy. An array of phosphors like phosphor 122 form pixels (the smallest individual picture element) on the display screen. In a black and white or gray-scale displays, there is typically one phosphor per pixel. In color displays, three or four phosphors form a single pixel.
A control circuit controls voltage levels of the row and column electrodes 102, 103 and establishes a bias voltage between the row electrodes 102 (and, thus, emitters 104) and the column electrodes 103. The voltage on the column electrodes 103 (gate voltage) causes an electric field which permits or prevents the emission of electrons from the emitters 104. For column electrode 103 having 1 to 1.5 micron emitter holes, a typical gate to emitter bias voltage which permits a sufficient flow of electrons from cold cathode emitters 104 is between 40 and 80 V.
Electrons emitted from the emitters 104 have an initial energy which depends on the gate to emitter bias voltage. Once liberated from the emitters 104, the electrons are accelerated by a positive voltage on anode 121. A typical anode voltage for a flat CRT with a field emitter cathode is 300 to 700 V. Voltages larger than 700 V tend to cause electrical breakdown in spacers 110 and consequent electrical shorting between the cathode and anode. Breakdown is caused by strong electric fields that result from the short distance between the cathode and anode, typically 0.020 inches (0.51 mm).
The cathode to anode distance cannot be increased because of focussing requirements. A typical flat CRT with field emitters uses proximity focusing, and the distance between cathode and anode must be approximately equal to the pixel pitch. (Pixel pitch is the distance between the centers of adjacent pixels.) If the distance is much greater, electrons from one set of emitters 104 strike more than one pixel and images formed on the CRT screen are blurred.
The accelerated electrons strike a phosphor 122 and cause an emission of light. The intensity of the light from each pixel depends on composition of the phosphor 122, the flux of electrons (number of electrons per area per second), and the energy of the electrons. The low anode voltage used in flat CRTs (300 to 700 V for flat CRTs as compared to 20 to 35 kV for conventional CRTs), is a problem with the prior art flat CRTs. The low voltage restricts the type and efficiency of the phosphors used. Higher anode voltages would permit the use of more efficient phosphors that require less power to produce a given amount of light.
Generally, formation of an image on the display screen requires turning on and off individual pixels. Video images on a matrix addressed flat CRT are usually formed a row at a time, starting with the top row. The intensity or color of pixels in the top row are set, then the intensity of the following row of pixels is set, then the next, continuing row by row until the last row is reached at which time the cycle is repeated. This requires charging and discharging of row electrodes 102 at first frequency, and charging and discharging of the column electrodes 103 at a second higher frequency. The power used during charging is 1/2CV.sup.2, where C is the capacitance and V is the bias voltage between the row and column electrodes. Since power use goes up as the square of the voltage, low bias voltages are desirable.
For gray-scale, or color images with more than 8 colors, the intensity of light from each pixel must be adjustable and controllable. Typically, the intensity is controlled by controlling the flux of electrons that strike a pixel. The flux of electrons is controlled by controlling the bias voltage between the column electrode 103 and the row electrode 102. Larger bias voltages cause more electrons to be emitted from the emitters 104. Accordingly, control circuitry must address individual sets of emitters 104 switch the electron flow on or off, and control the magnitude of the gate to emitter bias voltage. Further, typical gate to emitter bias voltages (40 to 80 V) prevent the use of inexpensive CMOS drivers as control circuits. Lower switching voltages and a way to avoid using variable voltage levels to control pixel intensity would make control circuitry less expensive.
Field emitter based flat CRTs have also been expensive to make because of the field emitter manufacturing cost. A dielectric layer 105 between the row electrodes 102 and column electrodes 103 is typically the same thickness as the diameter of the gate hole 106. This thickness of dielectric layer 105 is relatively thin so that dielectric layer 105 suffers from high electric field stress. For example, with a 1 to 1.5 micron diameter gate hole, and a gate-to-emitter bias voltage of 40 to 80 V, the electric field across the dielectric layer 105 is comparable to fields which cause electrical breakdown in the dielectric layer 105. Defects or impurities in the dielectric layer 105 or the emitter surface can lead to shorts between the row and column electrodes 102, 103, resulting in a defective display. Also, foreign particles or defective emitters can lead to shorts or arcs between the gate films and the emitters.
To prevent such shorts from ruining a display, field emitter developers have proposed placing resistors (in the form of patterned resistive films) between the base of the emitters and the row (or base) electrodes. These resistors add cost to the field emitter cathode because they add another patterned thin film layer, and because accurate registration must be maintained between the resistor pattern and other layers in the field emitter structure.
If the gate film could be made from resistive material, then the resistor between the emitter 104 and row electrode 102 could be eliminated, enabling the use of non-patterned resistive films. This, in turn, would reduce the fabrication cost of the field emitter structure. Such a resistive gate film is not possible in a conventional field emission structure because the gate addressing frequencies require that the film be relatively conductive to charge and discharge the capacitance. Gate resistance of 10 ohms/.quadrature. or less are typically required when row or column addressing is done using resistively patterned gate film electrodes. Substantially higher resistance is required to protect against shorting and arcing.